Monday, 15 July 2013

Design of 8 : 3 Encoder using When - Else Statement (VHDL Code)

Design of 8 : 3 Encoder using When-Else Statement (Data Flow Modeling Style)-










Output Waveform : 8 : 3 Encoder



VHDL Code-




-------------------------------------------------------------------------------
--
-- Title       : encoder8_3
-- Design      : vhdl_test
-- Author      : Naresh Singh Dobal
-- Company     : nsd
--
-------------------------------------------------------------------------------
--
-- File        : 8 : 3 Encoder using when else.vhd

   
   
library IEEE;
use IEEE.STD_LOGIC_1164.all;

entity encoder8_3 is
     port(
         din : in STD_LOGIC_VECTOR(7 downto 0);
         dout : out STD_LOGIC_VECTOR(2 downto 0)
         );
end encoder8_3;

architecture encoder8_3_arc of encoder8_3 is
begin

    dout <= "000" when (din="10000000") else
            "001" when (din="01000000") else
            "010" when (din="00100000") else
            "011" when (din="00010000") else
            "100" when (din="00001000") else
            "101" when (din="00000100") else
            "110" when (din="00000010") else
            "111";

end encoder8_3_arc;

2 comments :

Anonymous said...

please provide us the vhdl code for sequence detector 1010

LOUIS said...

-- Code your design here
library IEEE;
use IEEE.std_logic_1164.all;
entity encoder8_3 is
port(
din : in STD_LOGIC_VECTOR(7 downto 0);
dout : out INTEGER RANGE 0 TO 15
);
end encoder8_3;

architecture encoder8_3_arc of encoder8_3 is
begin

dout <= "0" when (din="10000000") else
"1" when (din="01000000") else
"2" when (din="00100000") else
"3" when (din="00010000") else
"4" when (din="00001000") else
"5" when (din="00000100") else
"6" when (din="00000010") else
"7";

end encoder8_3_arc;

WILL THIS WORK?

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